Compartir
On-Chip Training Npu - Algorithm, Architecture and Soc Design
Hoi-Jun Yoo
(Autor)
·
Donghyeon Han
(Autor)
·
Springer
· Tapa Dura
On-Chip Training Npu - Algorithm, Architecture and Soc Design - Han, Donghyeon ; Yoo, Hoi-Jun
Sin Stock
Te enviaremos un correo cuando el libro vuelva a estar disponible
Reseña del libro "On-Chip Training Npu - Algorithm, Architecture and Soc Design"
Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.