Compartir
Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS
Krishnendu Chakrabarty
(Autor)
·
Brandon Noia
(Autor)
·
Springer
· Tapa Blanda
Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS - Noia, Brandon ; Chakrabarty, Krishnendu
Sin Stock
Te enviaremos un correo cuando el libro vuelva a estar disponible
Reseña del libro "Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS"
This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.
- 0% (0)
- 0% (0)
- 0% (0)
- 0% (0)
- 0% (0)
Todos los libros de nuestro catálogo son Originales.
El libro está escrito en Inglés.
La encuadernación de esta edición es Tapa Blanda.
✓ Producto agregado correctamente al carro, Ir a Pagar.
